1. Technical Field
The present invention relates generally to circuit board technology, and more particularly, to a method of manufacturing a circuit board wherein the plated through holes are pre-profiled to prevent burr formation.
2. Related Art
Castellated plated through holes located at the periphery of a substrate or circuit board are commonly used in circuit technology for various applications. For instance, castellated plated through holes may be used when coupling adjacent circuit boards, thereby providing a solder inspection joint to ensure the solder "wicks up" properly at the interface of the two boards.
Various methods are currently used to create castellated plated through holes at the edges of circuit boards. For instance, a castellated plated through hole may be formed by injection molding, or by cutting, milling, drilling, blanking, etc., the edges of the circuit board. However, as illustrated in FIG. 1, conventional methods tend to produce a circuit board 1, wherein protruding burrs 3 are formed in the castellated plated through holes 2.
FIG. 2 illustrates a prior art profiling tool 4, rotating in the direction indicated by arrows 5, approaching a plated through hole 7 within circuit board 1 from a lateral direction indicated by arrow 6. As shown in FIG. 3, burr formation results when profiling tool 4, moving along a path 11, begins to break through a leading edge 8 of inner hole wall 9. "Leading edge" refers to the first surface or edge of plated through hole 7 contacted by profiling tool 4. Once leading edge 8 of plated through hole 7 has been severed, the only forces available to resist profiling tool 4 are the adhesive forces located between inner hole wall 9 and a layer of copper laminate 10 plated thereon. The heat generated as profiling tool 4 completes the pass through plated through hole 7, causes copper laminate 10 to detach and pull away from inner hole wall 9 at leading edge 8. This occurs because the adhesive forces between copper laminate 10 and inner hole wall 9 at leading edge 8 are not sufficient to hold copper laminate 10 in place. FIG. 4 shows the loose flap of copper laminate at leading edge 8 of plated through hole 7 folded over and protruding into the center of castellated plated through hole 2, resulting in what is commonly referred to as a "burr" 3.
The problems associated with burr formation include the potential to dislodge and short circuit the device, interference with inspection of solder joints, contamination of further processing steps, and so on.
Based on the above, there is a need for a new method of creating castellated plated through holes in circuit boards which does not result in burr formation.